Docs / nablatensor-engine-rocm / com.nablatensor.backend.rocm
final class
HipCompute
Public facade over the package-private HipRuntime, for code outside this module that needs a raw ROCm/HIP compute surface: HIPRTC compilation, device allocation, host<->device double transfers and a 1-D kernel launch.
The AAD ROCm replay engine (com.nablatensor.engine.rocm) is the intended caller; it mirrors com.nablatensor.backend.vulkan.VulkanCompute.
Methods
Whether a usable HIP device is present. Never throws.
Whether nablatensor should select the ROCm path automatically here: a usable device whose architecture is not one of the known-unstable consumer APUs. Set -Dnablatensor.rocm.allow_unsupported=true (or env NABLATENSOR_ROCM_ALLOW_UNSUPPORTED=1) to opt an APU back in for deliberate benchmarking. Never throws.
Device name for diagnostics, or a placeholder if the context is unavailable.
The --offload-arch target HIPRTC will build for (e.g. gfx1103).
Compiles HIP/CUDA-C source with HIPRTC and returns a launchable function handle for kernelName. Callers should cache the handle by source; this does not.
Host-to-device copy into an already-allocated pointer.
Launches a 1-D grid of grid blocks of block threads. Arguments are Long (device pointers / 64-bit scalars), Integer or Float, matched positionally to the kernel.