Docs / nablatensor-core / com.nablatensor.engine
final class
DeviceAadExecutable
A recorded tape compiled into an accelerator replay kernel, on top of a DeviceRuntime. One class for every "linear buffer + scalar arguments" backend — CUDA, ROCm, OpenCL — replacing the three near-identical *AadKernel classes each of those engines used to carry. (The Vulkan engine has its own executable on the same GpuAadExecutable base: SPIR-V dispatch with push constants and descriptor sets does not fit the DeviceRuntime surface.)
Recording and the kernel compile happen once, in compile; after that a replay costs one launch plus a small per-work-group partial download, no matter how many scenarios it covers. Inputs are kernel arguments, so setInput re-prices a shifted market with no re-record and no re-compile — and an unchanged input set is not re-uploaded.
For a long adjoint tape (over nablatensor.checkpoint.minNodes, and only when -Dnablatensor.checkpoint=on) the kernel is segment-checkpointed rather than fully unrolled — see AadCheckpointPlan — which needs a per-invocation scratch buffer and two extra kernel arguments.
Methods
The portable CUDA-C generator that CudaAadCodegen emits: the CUDA engine compiles it with NVRTC and the ROCm engine with HIPRTC, both unchanged. The OpenCL engine passes its own dialect rewrite instead.
Segment checkpointing is opt-in: verified bit-for-bit against the unrolled kernel, but on an integrated GPU the RNG-heavy forward recompute and the checkpoint traffic cost about what the occupancy buys back. Enable with -Dnablatensor.checkpoint=on or an explicit -Dnablatensor.checkpoint.minNodes=<n>.
Record-once compile. maxChunkSeconds is the per-dispatch wall-clock budget the base class uses to size chunks — tighter on a GPU that also drives a display.